
The Memory Bus
The memory bus is the set of "wires" that is used to carry memory addresses and data to and from the system RAM. The memory bus in most PCs is also shared with the processor bus, connecting the system memory to the processor and the system chipset. The memory bus is part of the PC's hierarchy of buses, which are high-speed communications channels used within the computer to transfer information between its components. See here for more details on buses, and here for a description of the memory bus in relation to the processor, as well as memory bus specifics for different processors.
The memory bus is made up of two parts: the data bus and the address bus. When people just make reference to the memory bus they are usually referring to the data bus, which carries actual memory data within the PC. The address bus is used to select the memory address that the data will come from or go to on a read or write.
The wider the data part of the bus, the more information that can be transmitted simultaneously. Wider data buses generally mean higher performance. The speed of the bus is dictated by the system clock speed and is the other main driver of bus performance. The bandwidth of the data bus is how much information can flow through it, and is a function of the bus width (in bits) and its speed (in MHz). This is described in more detail here.
You can think of the data bus as a highway; its width is the number of lanes and its speed is how fast the cars are traveling. The bandwidth then is the amount of traffic the highway can carry in a given unit of time, which is a function of how many lanes there are and how fast the cars can drive in them. More bandwidth means better performance.
The width of the address bus controls the addressability of the system memory, which is how much system memory the processor can read or write to. Continuing the highway analogy, the address bus carries information about the different exit numbers on the highway. The wider the address bus, the more digits the exit number could have, and the more exits that could be supported on the highway. Most systems can address far more memory than they will ever use. See this section that shows address bus widths and addressability for various processors.
The Processor-Memory Bottleneck
The memory bus is actually a major limiting factor to overall system performance. Older computers had the processor running at the same speed as the memory bus, but newer ones have the processor running at 2, 3 or even more times the speed of the memory. The more that the processor is running faster than the memory, the more often it will have to wait for information from the memory. This is why the system cache is so important, because it is much faster than the main memory, which means the processor can do more useful work and less waiting.
Bus Mastering
On the higher-bandwidth buses, a great deal of information is flowing through the channel every second. Normally, the processor is required to control the transfer of this information. In essence, the processor is a "middleman", and as with many similar cases in the real world, it is far more efficient to "cut out" the middleman and perform the transfer directly. This is done by having capable devices take control of the bus and do the work themselves; devices that can do this are called bus masters. In theory, the processor can do other work simultaneously; in practice there are several complicating factors. In order to do bus mastering properly, a facility to arbitrate between requests to "take over the bus" must exist; this too is provided by the chipset. Bus mastering is also called "first party" DMA since the work is controlled by the device doing the transfer.
Direct Memory Access (DMA) Modes and IDE Bus Mastering
Direct memory access or DMA is the generic term used to refer to a transfer protocol where a peripheral device transfers information directly to or from memory, without the system processor being required to perform the transaction. DMA has been used on the PC for years, traditionally over the ISA bus for devices like sound cards, using DMA channels which are a standard system resource. The floppy disk interface also uses conventional DMA.
Modern IDE/ATA hard disks use "first party" DMA transfers, where the peripheral device itself does the work of transferring data to and from memory. This is also called bus mastering. Bus mastering allows the hard disk and memory to work without relying on the old DMA controller built into the system, or needing any support from the CPU. It requires the use of the PCI bus (older buses like MCA also supported bus mastering but are no longer in common use).
PCI Bus Mastering
As discussed in the section on system bus functions and features, bus mastering is the capability of devices on the PCI bus (other than the system chipset, of course) to take control of the bus and perform transfers directly. The PCI bus is the first bus to popularize bus mastering; in part this is probably because for the first time there are operating systems and software that are really capable of taking advantage of it.
PCI supports full device bus mastering, and provides bus arbitration facilities through the system chipset. PCI's design allows bus mastering of multiple devices on the bus simultaneously, with the arbitration circuitry working to ensure that no device on the bus (including the processor!) gets locked out by any other device. At the same time though, it allows any given device to use the full bus throughput if no other device needs to transfer anything. In a way, the PCI bus acts like a tiny "local area network" inside the computer, in which multiple devices can each talk to each other, sharing a communication channel that is managed by the chipset.
PCI IDE Bus Mastering
The PCI bus also allows you to set up compatible IDE/ATA hard disk drives to be bus masters. Under the correct conditions this can increase performance over the use of PIO modes, which are the default way that IDE/ATA hard disks transfer data to and from the system. When PCI bus mastering is used, IDE/ATA devices use DMA modes to transfer data instead of PIO; IDE/ATA DMA modes are described in detail here.
Since this capability was made available to newer machines, it has been one of the most talked about (and most misunderstood) functions of the modern PC. There is a lot of confusion amongst PC users about what PCI IDE bus mastering does and how it works. In particular, there are a lot of misconceptions about its performance advantages. In addition, there have been a lot of problems with compatibility in getting this new technology to work.
IDE bus mastering requires all of the following in order to function at all:
Bus Mastering Capable System Hardware:
This includes the
motherboard, chipset, bus and BIOS. Most newer motherboards using the
Intel 430 Pentium chipset family (FX, HX, VX, TX) or the Intel 440FX
Pentium Pro chipset, will support bus mastering IDE.
Bus Mastering Hard Disk:
Normally this means that the drive must be
capable of at least multiword DMA mode 2 transfers.
32-Bit Multitasking Operating System:
This means usually Windows NT,
Windows 95, Linux, or similar (but see below for caveats.)
Bus Mastering Drivers:
A special driver must be provided to the
operating system to enable bus mastering to work.
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